There's Plenty of Room at the Bottom of the Energy Budget

In December 1959, Richard Feynman gave a talk to the American Physical Society with a question in it that sounded absurd. Why, he asked, can we not write the entire twenty-four volumes of the Encyclopaedia Britannica on the head of a pin?

He was not being whimsical. He did the arithmetic on stage. A pinhead is about 1/16th of an inch across; the printed area of the Britannica is about 25,000 times larger in linear dimension. Shrink the text by that factor and each dot of a halftone photograph becomes roughly thirty-two atoms across - still enormous compared to an atom, still comfortably above any physical limit. The laws of physics do not forbid it. Feynman offered a thousand dollars to whoever did it first. In 1985, a Stanford graduate student named Tom Newman etched the opening page of A Tale of Two Cities at exactly that scale and collected the cheque.

Feynman’s move was not prophecy. It was a particular kind of argument, and it is the most useful argument in engineering: compute the distance between what we currently do and what physics actually permits. If that distance is small, stop - you are near the end, and your effort belongs elsewhere. If it is enormous, the wall is not what is stopping you, and it is worth finding out what is.

Run that same calculation for the energy cost of computing intelligence, and it opens a gap with the same striking character as the one Feynman pointed at, the one that motivated nanotechnology.

I · How far down is the floor?

In 1961, an IBM physicist named Rolf Landauer asked what the thermodynamics of computation actually are. His answer, now called Landauer’s principle, is beautifully specific: logically irreversible operations - the ones that destroy information, like overwriting a bit or merging two computational paths into one - must dissipate at least kT ln 2 of energy as heat. Everything else, Charles Bennett showed in 1973, can in principle be done reversibly and therefore for free.

At room temperature, kT ln 2 is about 2.9 zeptojoules. That is 0.0000000000000000000029 joules. It is a real physical bound, not a hand-wave: in 2012 Antoine Bérut and colleagues measured it directly, trapping a single colloidal particle in a double-well optical potential and confirming that erasing one bit of information released heat approaching exactly that limit. Two years later a feedback-trap experiment tightened the measurement further.

Now put that next to what we spend.

The arithmetic, so you can check it

Training GPT-3 took roughly 3.14 × 10²³ floating-point operations and, by Google and Berkeley’s published accounting, about 1,287 MWh of electricity end to end.

1,287 MWh = 4.63 × 10¹² J ÷ 3.14 × 10²³ FLOPs ≈ 15 pJ per FLOP (system-level)

Now charge the same computation at the Landauer floor. This requires assuming how many bits each operation irreversibly destroys - and that number is genuinely not well established. It depends on the arithmetic’s internal structure, the datatype, and how much intermediate state is discarded rather than carried. So rather than pick one figure and present it as fact, here is the whole plausible range:

bits erased per op │ floor for 3.14 × 10²³ ops │ gap vs 1,287 MWh
       1           │        0.25 Wh            │      5 × 10⁹
      32           │        8 Wh               │      1.6 × 10⁸
     100           │       25 Wh               │      5 × 10⁷

Even the most conservative row leaves a gap of tens of millions. The conclusion is insensitive to the assumption - which is the only reason it is worth stating at all. The often-quoted “32 bits per operation” is a modelling convenience, not a measured quantity, and anyone using it should say so.

Before that number does any rhetorical work, it needs three corrections, and skipping them is how this argument usually goes wrong.

First: Landauer’s bound is a floor, not a target. It describes erasure performed infinitely slowly, at thermal equilibrium, with no margin for error. Real devices must switch fast and switch reliably, and reliability costs energy: to keep error rates acceptable against thermal noise you need a signal several times kT, not one. Practical estimates for a physically realisable, fast, reliable irreversible device land nearer 100 to 1,000 kT per operation. That eats two or three orders of magnitude of the gap immediately.

Second: the system is not the chip. That 15 pJ/FLOP figure includes memory, networking, power conversion, cooling, and idle time. A modern accelerator running flat out, package and all, is closer to 0.7 pJ per FLOP, twenty times better. Comparing a full datacentre to an idealised isolated bit-erasure flatters the conclusion.

Third: not every joule is erasing information. Most of them, as we are about to see, are not computing anything at all.

Make all three corrections generously and the remaining headroom is something like 10⁴ to 10⁶. Not a hundred million. Still: a factor of ten thousand to a million. For comparison, the entire history of computing - from ENIAC to an H100 - is about eleven orders of magnitude of energy efficiency improvement. There is roughly half of that history still sitting on the table, unclaimed, permitted by physics.

Two serious objections to the floor itself

The principle is contested at the foundations. Since 2005 the philosopher of physics John Norton has argued that Landauer’s principle has never actually been proved - that the standard derivations quietly assume what they set out to show, and that the whole enterprise of “thermodynamics of computation” is, in his phrase, a spurious science. James Ladyman and collaborators published a proof; Norton disputed it; the defence and counter-defence continue in the literature. Most working physicists accept the principle, and the experiments are consistent with it. But it is not the settled bedrock that popular accounts imply, and an argument resting on it should say so.

The engineering floor is far above the physics floor. This is the more practically damaging objection, and it is quantitative. Zhirnov, Cavin, Hutchby and Bourianoff worked out in 2003 what a real, reliable binary switch actually costs, and found the minimum scales not as kT ln 2 but as roughly 2kT ln(1/p_error) - you pay for every order of magnitude of reliability you demand. They also showed that a switch operating at that bound, packed at maximum density, hits a critical dimension near 1 nm and then runs into a hard wall that has nothing to do with information theory: you cannot get the heat out. Landauer sets a floor. Reliability raises it. Thermal density then puts a ceiling on how many of them you may usefully stack.

The most direct consequence: don’t erase anything

Landauer’s bound has an obvious corollary that deserves more attention than it usually gets in AI-hardware discussions. If the cost attaches specifically to irreversible operations - the ones that destroy information - then a computation arranged to destroy nothing has, in principle, no lower bound from Landauer’s argument. Charles Bennett proved in 1973 that this is not a loophole but a theorem: any computation can be restructured as a reversible one.

This is not a thought experiment. Adiabatic CMOS circuits recover charge from the capacitors they switch rather than dumping it to ground, and reversible logic families have been fabricated and measured. Michael Frank has spent a career mapping the design space. There are currently commercial attempts to build reversible processors on this principle.

And it has genuine costs, which is why it has not taken over:

What reversibility charges you instead

Time. Adiabatic switching only approaches zero dissipation as it approaches infinite slowness - energy saved scales roughly with how gently you switch. You buy joules with seconds, which is an awkward trade when throughput is the product.

Space. Reversibility means never throwing intermediate results away, because discarding them is exactly the erasure you were avoiding. Bennett’s own construction trades memory for reversibility, and memory is neither free nor, as we are about to see, energetically cheap to access.

Overhead. Reversible gate families need more transistors and more complex clocking than their irreversible equivalents. That overhead is paid in ordinary, irreversible ways.

Where it stands: reversible computing is the most theoretically direct route to the floor, it works, and its practical energy advantage at useful speeds remains modest and contested. It belongs in any serious accounting of this problem - and it is a live area rather than a settled one.

The question is not whether the room exists. It demonstrably does. The question is which road reaches it - better digital chips, reversible logic, or a machine organised on some different principle entirely.

II · Where the joules actually go

In 2014, Stanford’s Mark Horowitz gave an ISSCC keynote that has been cited in nearly every serious hardware-efficiency paper since. Its central table is one of the most clarifying objects in modern engineering. At 45 nanometres:

Twelve decades of energy, on a logarithmic scale. Arithmetic (blue-ish) is nearly free. Moving the numbers to the arithmetic (orange) is what costs. Sources: Landauer (1961); Horowitz, ISSCC 2014; NVIDIA H100 datasheet; Patterson et al. (2021). Analog MAC is a projected target, not a measured system figure.

Stare at the two ends. A 32-bit integer addition costs 0.1 picojoules. Fetching the 32-bit number to add from DRAM costs 640 picojoules - 6,400 times more than the operation it enables. Even reading it from on-chip SRAM costs fifty times the addition.

The conclusion is not that arithmetic is free - at 10²³ operations even a fraction of a picojoule accumulates into megawatt-hours, and in a well-optimised kernel with high data reuse the arithmetic units are a substantial share of the power draw. The conclusion is comparative and it is still striking: per operation, moving the operands costs far more than operating on them, and in workloads with poor reuse the movement dominates outright.

The von Neumann tax. Energy to move one 32-bit value to the place where it can be added, versus the addition itself. Arrow thickness is proportional to energy on a log scale. Figures: Horowitz, ISSCC 2014 (45 nm). Newer nodes shift the absolute numbers down; the ratio has proved stubborn, because wire capacitance scales far worse than transistors.

This is why the last decade of AI hardware has been, essentially, a war on data movement - bigger caches, HBM stacked on the package, systolic arrays that reuse each fetched value hundreds of times, quantisation to make the numbers smaller so more fit per fetch, and now enormous chips whose main virtue is that data has less far to go. Every one of these is a genuine improvement. Every one of them is also a workaround for the same underlying arrangement: the memory is over here, the compute is over there, and the bits must commute.

None of this is a secret - the incumbents publish it themselves

It would be convenient to present the memory wall as an insight the industry has missed. The opposite is true, and the numbers come from the company with the most to lose from them.

NVIDIA’s chief scientist Bill Dally has laid out where the energy goes in a modern AI accelerator. In his Trends in Deep Learning Hardware talk, the split is roughly 47% in memory and 47% in the arithmetic itself, with only about 6% left in moving data between them. That small movement figure is not evidence that movement is cheap; it is a measure of what a decade of interconnect engineering costs to hold it down. At Hot Chips in 2023 he showed why that work is so hard: the energy to move one bit varies by something like 50,000× with distance, on-chip versus across a rack, and NVIDIA’s target for interconnect is around 1 picojoule per bit, pursued through silicon photonics and dense wavelength-division multiplexing. Their ground-referenced signalling already achieves roughly that, against 6 to 7 pJ/bit for conventional SerDes; a silicon interposer reaches about a tenth of a picojoule.

So the diagnosis in this essay is not contrarian. It is the mainstream engineering consensus, argued most forcefully by the people building the current generation. Where the disagreement lies is in the prescription: whether the answer is to keep shortening the wires - which is what photonics, chiplets, and 3D stacking amount to - or to change the arrangement so the numbers do not have to travel at all.

III · Why not simply wait for better chips?

Because the two engines that used to make waiting a sound strategy have both stalled.

The first was Dennard scaling. In 1974, Robert Dennard and colleagues at IBM described a beautiful property of MOSFETs: shrink a transistor’s dimensions and voltage together, and power density stays constant. Smaller meant faster and cooler, for free, generation after generation. It is the reason clock speeds climbed from megahertz to gigahertz in twenty years. Around 2005 it broke, because voltages could not keep falling without leakage currents swamping the gains. Clock speeds have been roughly flat ever since; we went multicore not because parallelism was elegant but because frequency was no longer free.

The second was Koomey’s law. Jonathan Koomey’s team documented that computations per joule doubled roughly every 1.57 years from the vacuum-tube era through 2000. After Dennard scaling ended, that doubling time stretched to about 2.6 years. Still exponential - but a markedly slower exponential, and increasingly bought with architectural specialisation rather than physics.

Meanwhile the demand side has done the opposite of stalling. Training compute for frontier models has been doubling roughly every six months since 2010, several times faster than efficiency is improving. The International Energy Agency estimated data centres, AI, and cryptocurrency together drew about 460 TWh in 2022 - roughly 2% of global electricity - and projected a range of 620 to 1,050 TWh by 2026. Independent analysis suggests AI alone could account for 85-134 TWh annually by 2027, comparable to the total consumption of a mid-sized industrial country.

Two exponentials, one of them much steeper. Schematic drawn from published rates*, not from a fitted dataset: frontier training compute doubling roughly every six months (Sevilla et al., 2022) against computations-per-joule doubling roughly every 2.6 years post-Dennard (Koomey et al., 2011). The absolute positions are illustrative; the divergence is the point.*

Put those two curves on the same axes and the direction is uncomfortable, though the strong version of the claim should be resisted. Capability growth is not bounded by electricity in any clean sense - data quality, algorithmic progress, capital and talent all bind too, and algorithmic efficiency has at times improved as fast as hardware. What the curves do support is narrower and still consequential: on the current substrate, energy is becoming a first-order constraint rather than a line item - one that increasingly shows up as siting decisions, grid-interconnect queues, and cooling limits rather than as a chip specification.

The counterpoint

Digital is not standing still, and betting against it has historically been a good way to lose. Specialised silicon, sparsity, quantisation to 4 and even fewer bits, better interconnect topologies, and algorithmic efficiency gains have compounded impressively - by some measures algorithmic progress alone has matched or exceeded hardware progress. Any new substrate must beat not today’s GPU but the GPU of the year it actually ships, which is a moving and fast-moving target. This is the strongest argument against everything that follows, and it deserves to be stated first rather than buried.

IV · The existence proof in your skull

Feynman had no example of a machine writing at atomic scale; he had only the argument from physical limits. On energy, we are luckier. There is a working system, currently reading this sentence, that performs perception, language, memory, planning, and motor control continuously on about twenty watts - less than the lightbulb in a refrigerator, and roughly a millionth of the power of a large training cluster.

The brain is not magic and it is instructive precisely because we know a fair amount about where its energy goes. In 2001 David Attwell and Simon Laughlin constructed a detailed energy budget for signalling in grey matter, tracing ATP consumption down to individual processes: the dominant costs are reversing the ion fluxes of action potentials and, above all, synaptic transmission - postsynaptic receptors alone account for a large share. Two years later Peter Lennie used that budget to ask a pointed question: given the brain’s fixed metabolic allowance, how many neurons can actually be active at once? His answer was on the order of one percent. The cortex cannot afford to think with all of itself simultaneously.

That constraint appears to have shaped the architecture rather than merely limited it. Three features follow - and they are worth reading as one biological solution to a resource problem, not as instructions:

Sparsity. Almost nothing is active at any moment, in contrast to a dense transformer that multiplies every input by every parameter regardless of relevance. Mixture-of-experts architectures arrived at conditional activation independently, from efficiency arguments rather than biological ones - which is mild evidence that the principle generalises beyond its origin.

Locality. Bullmore and Sporns describe a network visibly shaped by wiring cost: mostly short local connections, a small and rationed set of long-range hubs. Long wires are expensive in volume, delay and energy. Note that a GPU cluster has made the opposite trade deliberately and for good reasons - global connectivity buys flexibility and simplifies scheduling. The brain’s topology reflects its constraints, which are not identical to a datacentre’s.

Computation where the data is. A neuron does not fetch synaptic weights from distant storage, transport them to an arithmetic unit, and write back. The weight is the synapse. This is the feature with the clearest read-across, because it addresses the same bottleneck the previous section identified - though “biology does it this way” is a reason to investigate the arrangement, not evidence that it will work at our precision requirements.

The framing is modest: these are hypotheses with an existence proof attached, not a specification. Each has to earn its place on engineering grounds - and one of them, sparsity, largely already has.

Where the brain analogy breaks - and it does

The comparison is routinely abused, so: the brain is not running backpropagation, is not doing 16-bit matrix multiplication, and is not doing anything we can currently write down as an algorithm. It took roughly a billion years and a planet-sized search to arrive at, learns very differently, and is spectacularly bad at arithmetic that a 1970s calculator does perfectly. “The brain does it in 20 W” is not evidence that a transformer can be made to run in 20 W.

What it is evidence for is narrower and sufficient: that a physical system can implement general, adaptive, multimodal intelligence at a power budget six orders of magnitude below ours. It settles the question of whether the room exists. It says nothing about whether we know the road.

V · What a different machine would have to do

If the diagnosis is that we spend our energy transporting numbers to a separate arithmetic unit, then the prescription is not subtle: stop transporting them. Let the physical arrangement of the device be the computation.

This idea is old and it has a respectable pedigree. In 1982 John Hopfield showed that a network of simple units with symmetric couplings has an energy function it monotonically descends - that relaxation to equilibrium is itself a computation. Andrew Lucas’s 2014 paper made the scope startlingly clear by writing down explicit Ising formulations for essentially all of Karp’s NP-complete problems: partitioning, colouring, covering, travelling salesman. If you can build a physical system whose energy landscape you can program, and which reliably finds low-energy states, you have a general-purpose solver. Not a metaphorical one - a literal one.

The candidate field, and it is crowded

It is worth being explicit here, because writing on this topic - including earlier drafts of this essay - tends to slide from “physics-based computing is worth pursuing” into “and therefore this particular physics.” Several substrates are being seriously built, they make different bets, and none is currently the obvious winner:

Approach	The bet	Chief unresolved problem
Reversible / adiabatic CMOS	Don’t erase, so Landauer never charges you; stay in the mature silicon ecosystem	Energy saved scales with slowness; overhead and memory cost are real
Analog in-memory (memristive, flash)	Ohm’s law does the multiply where the weight is stored	Conversion at every array boundary; drift, noise, device variability
Photonics	Light moves and multiplies cheaply; enormous bandwidth	Electro-optic conversion, on-chip memory, footprint
Neuromorphic / spiking	Event-driven sparsity and local memory, as in cortex	Two decades in, wins remain narrow and workload-specific
Thermodynamic / probabilistic	Use thermal noise as a sampling resource instead of suppressing it	Very early; well-suited to sampling, not to general compute
Superconducting	Near-zero-resistance switching, extremely low energy per operation	Cryogenics can cost more than the computation saves
Ising machines / coupled oscillators	Relaxation is the computation; a settle costs almost nothing	Encoding overhead; frequently loses to classical heuristics

These are not mutually exclusive - an in-memory analog array is one plausible way to build an oscillator coupling, and a reversible clocking scheme could in principle drive either. But what the evidence supports is that the case for a physical substrate is much stronger than the case for any specific one, and anyone claiming otherwise is ahead of the data.

The remainder of this section examines coupled oscillators in more depth - not because the evidence singles them out, but because they are the branch we work on and can therefore describe concretely rather than in summary. Take many small things that oscillate, couple them so each pulls on the others’ phases, and let them go. Yoshiki Kuramoto’s 1975 model of exactly this is among the most-studied equations in nonlinear dynamics: from disorder, coupled oscillators spontaneously synchronise into structured patterns. Add a term pushing each toward one of two phases and you have a machine that settles into a binary state minimising an Ising energy - an Ising machine built from clocks. Wang and Roychowdhury formalised this as OIM in 2019; Csaba and Porod’s 2020 review surveys the family. Coherent optical versions have been built at scale: 2,000 spins in Inagaki et al.’s 2016 machine, fully programmable all-to-all coupling in McMahon et al.’s.

Their specific attraction is that the settle is nearly free and that phase may be a useful representational primitive (below). Their specific weakness is encoding overhead and the fact that, as the counter-literature below makes plain, physical annealers frequently lose to a well-tuned classical solver. Both belong in the same paragraph.

The attraction, in energy terms, is precise. The settle - the relaxation itself - is not a sequence of fetched-and-executed instructions. It is what the physics does when you stop holding it still. In a properly built substrate it costs approximately nothing, because nothing is being moved.

Working at the edge of chaos

But a population of oscillators is only useful in a narrow band of its own behaviour, and this turns out to be one of the deeper ideas in the field.

Couple them too strongly and they all lock into lockstep. The system is perfectly ordered, perfectly stable - and computationally dead, because every oscillator now says the same thing and the state carries no information about the input. Couple them too weakly and they drift independently: the system is rich in variety but retains nothing, and any perturbation is forgotten before it can influence anything. Neither extreme computes.

Between them lies a narrow regime - ordered enough to preserve information, disordered enough to keep responding - that Christopher Langton in 1990 named computation at the edge of chaos. It is not a slogan; it has been measured repeatedly and in very different systems:

The usable band is narrow. Each dot is one oscillator’s phase on a circle. Full synchrony is stable and information-free; full incoherence retains nothing. Useful computation lives in the transition between them - a regime that must be actively held, not merely arrived at.

Nils Bertschinger and Thomas Natschläger showed in 2004 that recurrent networks have their highest computational capability precisely at the order-chaos boundary, and later work extended the result to reservoir computing and echo-state networks. In deep learning theory the same structure appears in a different guise: analyses of signal propagation in deep networks find that trainability depends on initialising near a critical line separating ordered and chaotic phases - too far either way and gradients vanish or explode. In neuroscience, recordings of cortical activity show neuronal avalanches whose size distributions follow the power laws characteristic of a system poised near criticality. And in circuit theory, Leon Chua’s analysis of local activity identifies an “edge of chaos” regime as the origin of complex behaviour in nonlinear devices - a result that speaks directly to what a physical substrate would need to be biased into.

This matters enormously for engineering, and it is where a great deal of early enthusiasm founders. A substrate that merely minimises energy will happily slide into its most ordered state and sit there - the computational equivalent of a dead battery. The machine has to be held near a critical point: coupled enough to bind, noisy enough to stay responsive, and continuously prevented from collapsing into consensus. That is a control problem as much as a device problem, and it is not optional.

There is a second, less obvious attraction, and it is the reason we work on oscillators specifically rather than any energy-minimising system. In 1981 Christoph von der Malsburg proposed that the brain solves the binding problem - how “red” and “square” get attached to the same object rather than floating free - by temporal synchrony: neurons representing features of the same object fire in phase. Wolf Singer and Charles Gray’s work through the 1990s found suggestive experimental support. If that is even partly right, then phase is not an implementation detail of an optimiser; it is a representational primitive, and a machine made of oscillators would have it natively rather than having to simulate it.

Someone has now built one at scale

Until recently this line of argument lived mostly in physics papers and small demonstrations. That changed in 2026, when Unconventional AI - the startup founded by Naveen Rao, previously of Nervana and MosaicML - released Un-0, and open-sourced the weights, the training code, and the evaluation tooling.

Un-0 is a generative image model in which the conventional network layers are replaced by a simulated population of coupled Kuramoto oscillators. The coupling matrix and the natural frequencies are the learned parameters; an image is produced by integrating the phase dynamics forward - no diffusion schedule, no denoising loop, no adversary. A small conventional decoder handles the final conversion to pixels, at under 13% of the parameters. The published results are respectable rather than record-breaking: FID 8.76 on CIFAR-10 at 19.4M parameters, and FID 6.74 on ImageNet 64×64 at 322M parameters.

What makes it significant is not the FID. It is that a competently-executed, open, reproducible artifact now exists demonstrating that a physical-dynamics primitive can carry a large generative model at all - the “hello world” framing its authors used is about right. It is the difference between an argument and an existence proof.

And the caveat its own authors state clearly

Un-0’s stated ambition is roughly 1,000× less energy than GPU execution. That figure is a projection about future hardware, not a measurement - and the project is straightforward about it. Un-0 today trains on NVIDIA B200s, and the largest ImageNet model consumed around 640 B200-hours to train. The oscillators are simulated, on exactly the digital silicon the argument hopes eventually to leave behind.

The authors are similarly candid about quality: Un-0 “still trails later high-performing models such as EDM and GDD,” and while quality improves with scale, it does so “more slowly than the conventional frontier.”

This is the shape of the whole field right now, and worth internalising before reading anyone’s energy claims, including the ones earlier in this essay. The algorithm is demonstrated. The energy win is projected. Those are very different kinds of statement, and the distance between them is measured in fabricated silicon that does not yet exist.

The counter-literature, which is substantial

Binding-by-synchrony has serious critics. Michael Shadlen and Anthony Movshon’s 1999 Neuron paper “Synchrony Unbound” argues the hypothesis is underdetermined by the data and that observed synchrony may be a byproduct of shared input rather than a code. It remains unresolved.

Physical Ising machines have an equally pointed critique. Hopfield and Tank’s 1985 travelling-salesman demonstration was, famously, shown by Wilson and Pawley three years later to be unstable and to produce poor tours. Rønnow et al.’s 2014 Science analysis found no evidence of speedup for a commercial quantum annealer against well-tuned classical algorithms on random instances. Mohseni, McMahon and Byrnes’s 2022 review - written by people who build these machines - is careful to note that specialised Ising hardware frequently loses to a good heuristic on a laptop. Building a physical optimiser is easy. Building one that beats a well-written classical solver is not.

VI · Where these arguments usually break

Physical computing has been proposed, in one form or another, for forty years. It has not displaced digital. Any serious version of this argument has to explain why not - and the explanations are documented in the literature, mostly by the people building the machines.

The appealing claim	What the record shows	Source
Relaxation solves hard combinatorial problems	The founding demonstration - a Hopfield network solving the travelling salesman problem - was shown three years later to be unstable and to produce poor tours. Encoding quality, not device physics, dominated.	Hopfield & Tank 1985; Wilson & Pawley 1988
Physical optimisers beat classical solvers	Frequently they do not. Careful analysis found no speedup for a commercial annealer against well-tuned classical algorithms; reviews by practitioners note that specialised Ising hardware often loses to a good heuristic on commodity hardware.	Rønnow et al. 2014; Mohseni et al. 2022
Analog crossbars give 100-1000×	At the kernel, yes. At the system, the analog-to-digital converters and peripheral circuits routinely consume the majority of energy and area - the win is largely paid back at the boundary.	Shafiee et al. 2016; in-memory surveys
Synchrony is how brains bind features	Contested since 1999. Observed synchrony may reflect shared input rather than a binding code; the hypothesis remains underdetermined by the data.	Shadlen & Movshon 1999
Neuromorphic chips win on real workloads	Demonstrated wins are real but narrow and workload-specific; general displacement of conventional accelerators has not occurred despite two decades and several major programmes.	Merolla 2014; Davies 2018; Modha 2023
A hybrid gets you most of the way	Amdahl’s law caps total gain at 1/(digital fraction), regardless of how good the physical part becomes. A 10% digital remainder means a 10× ceiling - permanently.	Amdahl 1967

There is one further difficulty that deserves naming on its own, because it is specific to modern AI rather than to physical computing in general. The dominant architecture of the last decade works by computing its own routing from the data - deciding, per input, which information should influence which other information. That decision is not a fixed wiring pattern; it is recomputed continuously. And fixed wiring is precisely what a physical substrate implements most naturally and most cheaply.

So the tension is structural rather than incidental. The part of the workload that is easy to make physical - the enormous static weight multiplications - is the part that is already efficient per operation. The part that is expensive and data-dependent is the part physics does worst. Any credible programme has to say how it resolves that, and “we will make the routing static” is not an answer if static routing costs you the capability that made the architecture worth accelerating.

The gap is real, the substrate is plausible, and the bridge does not yet exist. All three are true at once, and a serious programme has to hold them together rather than pick the flattering two.

VII · The goal, and how you would know you were wrong

Elon Musk’s formulation of a hard goal is instructive not because of its ambition but because of its structure: “make life multiplanetary” is unfalsifiable poetry, but it decomposes into land a booster, refuel in orbit, keep humans alive for six months, build a self-sustaining city - each of which is a specific engineering claim that can be independently attempted, measured, and failed. Feynman’s pinhead was the same: a number, a physical argument that the number was permitted, and a cheque for whoever got there.

So, stated plainly:

The goal

A machine with frontier-class capability running at a thousandth of today’s energy per unit of intelligence - and, at the end of the road, a person’s worth of intelligence on a person’s worth of power. Twenty watts.

A thousand times is deliberately far short of the million physics allows, and deliberately far beyond anything demonstrated to date. It is chosen to be hard enough to require a different substrate and near enough to be checkable within a decade.

And the milestones, each with the result that should stop the programme:

1. Show the algorithm is physics-shaped

   Build a model whose core operation is a relaxation rather than a feedforward pass, and show it learns language and images at all, on ordinary hardware, before any custom silicon exists. This is the cheapest possible test of whether the idea has a software future.

   Stop if: a relaxation-based model cannot match a conventional one at equal parameters and equal data.

2. Measure the whole hybrid, including conversion

   Static weights in analog, dynamic routing in digital, and an end-to-end joules-per-token number that includes the analog-to-digital conversion, the cost that quietly consumes most published analog wins.

   Stop if: measured system gain is under 3× after conversion overhead. That is not worth fighting a trillion-dollar digital ecosystem for.

3. Find one thing the relaxation does better

   A task where letting physics settle genuinely beats computing the answer step by step, at equal accuracy. Long-context retrieval and constraint satisfaction are the natural candidates. This is the crux of the whole programme: without it, the substrate is an implementation detail rather than a computational primitive.

   Stop if: no task shows a settle advantage at iso-accuracy after sustained effort. Then the right move is to convert to a pure energy play, or stop.

4. Silicon, measured not simulated

   A fabricated test chip: an oscillator array with digital control, reporting measured joules per settle and measured solution quality. Projections have a way of not surviving contact with a wafer.

   Stop if: measured energy is more than 10× worse than projection. The device physics does not support the architecture.

5. A system where the substrate dominates

   A complete model in which more than 90% of energy is spent in the physical substrate rather than in the digital scaffolding around it. Below this threshold Amdahl's law caps you in the single or double digits, whatever the device does.

   Stop if: the digital remainder cannot be pushed below 10%. The ceiling is then ~10× forever, a good chip, not a new kind of computer.

6. The goal: 1,000× at frontier capability

   Competitive quality, three orders of magnitude less energy, on hardware that exists. Then keep going: the physics permits perhaps another thousand beyond that.

VIII · What will go wrong

Anticipating failure modes specifically is more useful than optimism, so here are the ones we expect, roughly in order of how likely they are to be fatal.

The conversion tax eats the win. This is the field’s most common and most quietly devastating result. An analog crossbar can perform a multiply-accumulate for femtojoules - but the analog result must be digitised to be useful, and analog-to-digital converters are expensive in energy and area. In many published in-memory designs, the peripheral circuitry consumes the majority of total energy. The lesson is procedural: never quote a kernel number. Only end-to-end system numbers, with conversion included, mean anything.

Precision and drift. Analog devices vary between units, drift with temperature, age, and produce noisy results. Neural network inference is famously tolerant of noise - up to a point, and that point is workload-dependent and shifts as models change. Training in analog is dramatically harder than inference and mostly remains unsolved.

The memory wall does not politely disappear. In-memory computing removes the fetch for weights. Activations still move. Large models exceed any plausible on-chip array and must be tiled, which reintroduces exactly the traffic the architecture was meant to eliminate.

Amdahl, relentlessly. Every fraction of the workload that stays digital sets a hard ceiling on the total speedup, regardless of how good the analog part becomes. Our own measurement, the settle being under 1% of operations, is a live example of how sharply this bites.

Programmability and encoding overhead. An Ising machine solves what you can encode as an Ising model, and the encoding is not free: auxiliary variables, penalty weights that need tuning, and embedding onto a fixed connectivity graph can cost more than the speedup returns. This is a large part of why quantum annealers have underdelivered against classical heuristics.

There is no software stack. PyTorch, CUDA, compilers, profilers, twenty years of accumulated numerical libraries, and a global population of engineers who know them. A new substrate begins with none of that. The historical record on this is brutal: technically superior architectures have repeatedly lost to inferior ones with better ecosystems.

The benchmarks are polluted. Results are too often measured on the most favourable kernel, on the most favourable problem instance, against the least favourable baseline. Any programme in this space should assume its own results will be believed only if it publishes the failures, holds the baselines to the same tuning effort as the proposal, and reports system-level numbers. That is why the ledger above is in this document rather than omitted from it.

IX · The pinhead, again

Feynman closed his talk by noting that the field he was describing had no name and almost no practitioners, and that this was precisely why it was interesting. Nanotechnology took roughly thirty years to become a discipline, and it arrived by a route almost nobody in that lecture hall predicted - not tiny machines building tinier machines, but scanning probe microscopy, self-assembly, and semiconductor lithography that kept shrinking long past where anyone thought it would stop.

The energy argument is likely to run the same way. The gap is real and enormous: four to six orders of magnitude of headroom, permitted by thermodynamics, with a twenty-watt existence proof reading this sentence. The bridge, though, will probably not be the specific bridge anyone is currently drawing - and the record in §VI is the reason to hold any particular design loosely.

What the argument does establish is where to point. Not at better arithmetic, which is already nearly free. At the transport - at the fact that we burn thousands of times more energy shuttling numbers to the calculation than performing it, and that no amount of software cleverness fixes an arrangement in which the memory is over here and the computation is over there.

Feynman’s pin was not really about pins. It was about learning to ask, of any engineering problem, the only question that determines whether effort is worth spending: how far is it to the wall, and are we anywhere near it?

On the energy of intelligence, we are not near it - not within a factor of ten thousand. That does not guarantee the distance can be closed; some of it may turn out to be blocked by constraints we have not yet named, and the closer anyone gets, the more clearly those will show themselves. But it does mean that the wall is not currently what is stopping us, and that the limits we keep running into - heat, wires, converters, memory traffic - are the kind that have historically yielded to being attacked directly.

Which is the same conclusion Feynman reached about the pin, stated with the humility his own record earned: not that it will happen, but that nothing in the physics says it cannot, and that is sufficient reason to go and look.

X · Glossary

Every technical term used above, in plain language. Nothing here assumes a background in physics or computing.

Energy and heat

• joule (J) - The standard unit of energy. Lifting an apple one metre takes roughly one joule. Everything in this essay is ultimately counted in these.
• watt · watt-hour (W · Wh) - A watt is a rate - one joule every second. A watt-hour is the amount a one-watt device uses in an hour (3,600 joules). A megawatt-hour (MWh) is a million of those; a terawatt-hour (TWh) is a billion.
• pico · femto · atto · zepto - Prefixes for very small numbers, each a thousand times smaller than the last: pico = 10⁻¹², femto = 10⁻¹⁵, atto = 10⁻¹⁸, zepto = 10⁻²¹. A zeptojoule is a thousand-billion-billionth of a joule.
• kT - The characteristic energy of random thermal jiggling at temperature T. (k is Boltzmann’s constant, which converts temperature into energy.) Any signal much weaker than kT is drowned out by heat - which is why it sets the scale for everything.
• Landauer’s limit - The minimum heat that must be released when one bit of information is irreversibly destroyed: kT·ln 2, about 2.9 zeptojoules at room temperature. Merely moving or copying information carries no such cost in principle.
• reversible computing - Computing arranged so that no information is ever discarded - every step can in principle be run backwards. Since nothing is erased, Landauer’s cost does not apply. The price is having to keep every intermediate result.

Computers and chips

• FLOP - One floating-point operation - a single piece of arithmetic on a decimal number. Training a large model is measured in total FLOPs; GPT-3 took about 3 × 10²³ of them.
• DRAM · SRAM - Two kinds of memory. SRAM is fast and small and sits on the processor chip. DRAM is large and cheap and sits off-chip - and reaching it is where most of the energy goes.
• von Neumann architecture - The standard design of essentially every computer: one memory holding both program and data, and a separate processor that repeatedly fetches from it. The traffic between the two is the von Neumann bottleneck.
• Dennard scaling - The rule that held from 1974 to roughly 2005: shrinking a transistor made it proportionally faster and cooler, for free. Its end is why processor clock speeds stopped climbing.
• Moore’s law · Koomey’s law - Moore: transistor counts double on a regular cadence. Koomey: computations per joule double on a regular cadence. The second is the one that matters for energy, and it has slowed.
• ADC · DAC - Analog-to-digital and digital-to-analog converters - the circuits that translate between continuous physical signals and discrete numbers. In analog computers they frequently consume most of the energy, which is why they appear so often as a caveat.
• Amdahl’s law - If some fraction of a job cannot be accelerated, that fraction sets a hard ceiling on the total speedup - however fast you make everything else. A 10% un-accelerated remainder caps you at 10×, permanently.
• in-memory · analog computing - Doing the arithmetic inside the device that stores the numbers, using physical quantities such as currents or charges instead of digital logic - so the values never have to be fetched.
• neuromorphic - Hardware built to imitate the brain’s style of computation - spikes, local memory, event-driven activity - rather than the conventional instruction-driven style.

Physics-based computing

• Ising model - A physics model of many binary elements (“spins”, each +1 or −1) that prefer to agree or disagree with each other by a specified strength. Its lowest-energy arrangement turns out to encode the answers to a very wide class of optimisation problems.
• NP-hard - Informally: at least as hard as the hardest problems whose answers are easy to check but seemingly impossible to find quickly. Scheduling, routing and packing problems are typical. As problem size grows, the time to guarantee the best answer grows explosively. No physical machine is known to repeal this.
• coupled oscillators (Kuramoto model) - Many rhythmic things that nudge each other’s timing - pendulums, fireflies, circuits. Kuramoto’s 1975 equations are the standard description, and they predict that such populations spontaneously fall into synchrony.
• order parameter (r) - A single number from 0 to 1 measuring how synchronised a population is. 0 means completely scattered; 1 means perfect lockstep.
• edge of chaos - The narrow band between rigid order and disorder, where a system can both retain information and respond to new input. Systems compute best here; outside it they either freeze or forget.
• binding problem - How a brain or machine keeps track of which properties belong to which object - that this redness and this squareness describe the same thing, rather than floating around unattached.
• FID (Fréchet Inception Distance) - A standard score for image-generation quality, comparing statistics of generated images with real ones. Lower is better.

Brains

• ATP - The molecule cells use to carry energy - the body’s rechargeable battery. Neuroscience energy budgets are quoted in ATP molecules consumed per second.
• action potential · synapse - The electrical spike a neuron fires, and the junction where one neuron influences the next. Restoring the ions after a spike, and transmitting across synapses, are the brain’s two dominant energy costs.
• sparsity - Having only a small fraction of elements active at any moment. In the brain it is enforced by the energy budget; in machine learning it is an increasingly deliberate design choice.

XI · References

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11. Azevedo, F.A.C. et al. (2009). Equal numbers of neuronal and nonneuronal cells make the human brain an isometrically scaled-up primate brain. J. Comp. Neurol. 513(5), 532-541.
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23. Wang, T. & Roychowdhury, J. (2019). OIM: Oscillator-based Ising machines for solving combinatorial optimisation problems. UCNC 2019, LNCS 11493, 232-256.
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30. Patterson, D. et al. (2021). Carbon emissions and large neural network training. arXiv:2104.10350. - the GPT-3 figure.
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44. Dally, W.J. Hardware for Deep Learning, Keynote, Hot Chips 35 (2023): the interconnect figures (~50,000× by distance, ~1 pJ/bit target, ground-referenced signalling, ~0.1 pJ/bit interposer). The 47% memory / 47% math / 6% data-movement energy split is from Dally’s separate Trends in Deep Learning Hardware talk, not this keynote.
45. Unconventional AI (2026). Un-0: generating images with coupled oscillators. Model, weights, training and evaluation code released openly; github.com/unconv-ai/Un-0. - the first large-scale generative model using oscillator dynamics as the computational primitive.
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47. Bennett, C.H. (1973), op. cit.; Frank, M.P. (2005). Introduction to reversible computing: motivation, progress, and challenges. ACM Computing Frontiers, 385-390. - and the adiabatic-CMOS literature descending from Koller & Athas (1992) and Younis & Knight (1993).
48. Sebastian, A. et al. (2020). Memory devices and applications for in-memory computing. Nature Nanotechnology 15, 529-544. - the analog in-memory survey used for the candidate table.

Provenance of every number in this piece

2.9 zJ - kT ln 2 at 300 K, computed from Boltzmann’s constant; the principle is Landauer (1961), measured experimentally by Bérut et al. (2012) and Jun et al. (2014).

0.03 / 0.1 / 1.1 / 5 / 640 pJ - Horowitz, ISSCC 2014, the 45 nm table. This is the standard reference for these figures and is where nearly every subsequent efficiency paper takes them from.

0.7 pJ per FLOP, computed from a published accelerator datasheet: 700 W TDP ÷ ~10¹⁵ dense BF16 FLOP/s at peak. Peak is optimistic; real utilisation makes the effective figure worse.

1,287 MWh and 3.14 × 10²³ FLOPs for GPT-3 - Patterson et al. (2021), the Google/Berkeley carbon accounting paper. The 15 pJ/FLOP figure is those two numbers divided.

460 TWh in 2022; 620-1,050 TWh by 2026 - IEA, Electricity 2024. The 85-134 TWh/yr AI-specific projection is de Vries (2023). Earlier baseline: Masanet et al. (2020), Science.

Doubling every 1.57 → 2.6 years - Koomey et al. (2011). Doubling every ~6 months for training compute - Sevilla et al. (2022).

20 W, ~86 billion neurons, ~1% active - Azevedo et al. (2009) for the cell count; Attwell & Laughlin (2001) for the ATP budget; Lennie (2003) for the activity bound.

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Every figure is computed from the cited sources, and the arithmetic is shown so it can be checked and disputed. Written for the generalist reader. Corrections welcome.